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cpu/decoder - Implement RLCA, RLA, RRCA, RRA

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madmaurice 2023-08-29 21:25:19 +02:00
parent 7902ac4641
commit 39e041f473
1 changed files with 34 additions and 0 deletions
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34
cpu/decoder.cpp
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@ -298,6 +298,40 @@ void Cpu::executeInstruction()
bus->write8(state.DE, state.A); bus->write8(state.DE, state.A);
mcycles = 2; mcycles = 2;
break; break;
case 0x07: // RLCA
{
state.carry = (state.A & 0x80);
state.A = (state.A << 1) | (state.carry ? 0x01 : 0x00);
state.halfcarry = false;
state.subtract = false;
state.zero = false;
}
case 0x17: // RLA
{
bool msb_set = (state.A & 0x80);
state.A = (state.A << 1) | (state.carry ? 0x01 : 0x00);
state.carry = msb_set;
state.halfcarry = false;
state.subtract = false;
state.zero = false;
}
case 0x0F: // RRCA
{
state.carry = (state.A & 0x01);
state.A = (state.A >> 1) | (state.carry ? 0x80 : 0x00);
state.halfcarry = false;
state.subtract = false;
state.zero = false;
}
case 0x1F: // RRA
{
bool lsb_set = (state.A & 0x01);
state.A = (state.A >> 1) | (state.carry ? 0x80 : 0x00);
state.carry = lsb_set;
state.halfcarry = false;
state.subtract = false;
state.zero = false;
}
case 0xFA: // LD A, [nn] case 0xFA: // LD A, [nn]
state.A = bus->read8(readPC16()); state.A = bus->read8(readPC16());
mcycles = 4; mcycles = 4;