diff --git a/cpu/decoder.cpp b/cpu/decoder.cpp index 4e8ac9e..a84826e 100644 --- a/cpu/decoder.cpp +++ b/cpu/decoder.cpp @@ -7,6 +7,16 @@ static inline u16 make_u16(u8 msb, u8 lsb) return (((u16)msb << 8) | (u16)lsb); } +static inline void add16(Cpu& cpu, u16& out, u16 lhs, u16 rhs) +{ + u16 res11 = (lhs & 0x0FFF) + (rhs & 0x0FFF); + cpu.state.halfcarry = (res11 & 0x1000); + u32 res32 = lhs + rhs; + cpu.state.carry = (res32 & 0x10000); + cpu.state.subtract = false; + lhs = (u16)res32; +} + void Cpu::executeInstruction() { u16 currentpc = state.PC; @@ -164,12 +174,7 @@ void Cpu::executeInstruction() } else if((op & 0xCF) == 0x09) // ADD HL, rr { - u16 rhs = state.reg16((op >> 4) & 0x3); - u16 res12 = (state.HL & 0x0FFF) + (rhs & 0x0FFF); - state.halfcarry = (res12 & 0x1000); - u32 res32 = (u32)state.HL + (u32)rhs; - state.carry = (res32 & 0x10000); - state.subtract = false; + add16(*this, state.HL, state.HL, state.reg16((op >> 4) & 0x3)); mcycles = 2; } else if((op & 0xE7) == 0xC0) // RET cc @@ -490,29 +495,15 @@ void Cpu::executeInstruction() case 0xE8: // ADD SP, e8 { - u32 lhs = state.SP; - s32 rhs = (s8)readPC8(); - u32 low_add = (lhs & 0x0FFF) + (rhs & 0x0FFF); - state.halfcarry = (low_add & 0x1000); - u32 res32 = lhs + rhs; - state.carry = (res32 & 0x10000); - state.SP = (u16)res32; - state.subtract = false; + add16(*this, state.SP, state.SP, (s8)readPC8()); state.zero = false; mcycles = 4; } break; case 0xF8: // LD HL, SP + e8 { - u32 lhs = state.SP; - s32 rhs = (s8)readPC8(); - u32 low_add = (lhs & 0x0FFF) + (rhs & 0x0FFF); - state.halfcarry = (low_add & 0x1000); - u32 res32 = lhs + rhs; - state.carry = (res32 & 0x10000); - state.HL = (u16)res32; + add16(*this, state.HL, state.SP, (s32)((s8)readPC8())); state.zero = false; - state.subtract = false; mcycles = 3; } break;