cpu/decoder - Remove extraneous brackets

This commit is contained in:
madmaurice 2023-08-30 13:26:35 +02:00
parent 87b939c80e
commit dbd42c4573

View file

@ -139,10 +139,8 @@ void Cpu::executeInstruction()
mcycles = 4; mcycles = 4;
} }
else else
{
mcycles = 3; mcycles = 3;
} }
}
else if((op & 0xE7) == 0x20) // JR cc, e else if((op & 0xE7) == 0x20) // JR cc, e
{ {
s8 e = readPC8(); s8 e = readPC8();
@ -154,10 +152,8 @@ void Cpu::executeInstruction()
mcycles = 3; mcycles = 3;
} }
else else
{
mcycles = 2; mcycles = 2;
} }
}
else if((op & 0xE7) == 0xC4) // CALL cc, nn else if((op & 0xE7) == 0xC4) // CALL cc, nn
{ {
u16 nn = readPC16(); u16 nn = readPC16();
@ -168,10 +164,8 @@ void Cpu::executeInstruction()
mcycles = 6; mcycles = 6;
} }
else else
{
mcycles = 3; mcycles = 3;
} }
}
else if((op & 0xCF) == 0x09) // ADD HL, rr else if((op & 0xCF) == 0x09) // ADD HL, rr
{ {
add16(*this, state.HL, state.HL, state.reg16((op >> 4) & 0x3)); add16(*this, state.HL, state.HL, state.reg16((op >> 4) & 0x3));
@ -185,10 +179,8 @@ void Cpu::executeInstruction()
mcycles = 5; mcycles = 5;
} }
else else
{
mcycles = 2; mcycles = 2;
} }
}
else if((op & 0xC7) == 0xC7) // RST else if((op & 0xC7) == 0xC7) // RST
{ {
u16 rst_addr = op & 0x38; u16 rst_addr = op & 0x38;
@ -494,18 +486,14 @@ void Cpu::executeInstruction()
break; break;
case 0xE8: // ADD SP, e8 case 0xE8: // ADD SP, e8
{
add16(*this, state.SP, state.SP, (s8)readPC8()); add16(*this, state.SP, state.SP, (s8)readPC8());
state.zero = false; state.zero = false;
mcycles = 4; mcycles = 4;
}
break; break;
case 0xF8: // LD HL, SP + e8 case 0xF8: // LD HL, SP + e8
{
add16(*this, state.HL, state.SP, (s32)((s8)readPC8())); add16(*this, state.HL, state.SP, (s32)((s8)readPC8()));
state.zero = false; state.zero = false;
mcycles = 3; mcycles = 3;
}
break; break;
default: default: